Multi-processor SoC subsystem for Car Infotainment
In 2004 in Philips Semiconductors, I worked on a multi-processor SoC subsystem for Car infotainment systems. The work focused on streaming software infrastructue, but also included both asynchronous hardware to interconnect DSP cores.
The Sea-of-DSP streaming infrastructure is deployed in NXP automotive chips (among others CaRaCas, Cayman, Mars) for software defined radio and audio processing on a mix of ARM, Tensilica and NXP EPICS processors. The software infrastructure provides streaming across a mix of embedded processors with very high synchronization rates and a high-level interface to (re-)configure streaming networks at run-time with very little (order of a few kilo bytes) overhead.